preliminary ? ? ? ? ? ? ? ? ? ? ? ? ? RCV7050P ------- smd selectable frequency voltage controlled crystal oscillator ------- ------- high performance vcxo in a 7 x 5 mm surface mount package with selectable output frequency ------- product description ------- the RCV7050P selectable vcxo combines low rms phase jitter and low power with the ability to select the output frequency from up to four factory-configured frequencies by controlling two frequency select (fs) pins (e.g. 122.88 or 153.6 mhz). this enables reductions in part count and built-in upgrade paths to increase design flexibility and reduce costs. ------- applications base stations consumer communications dsl/adsl ethernet wi-fi wimax/w-lan ------- features selectable output frequencies (up to 4) low power differential outputs <1ps integrated rms phase jitter (12 khz to 20 mhz) wide frequency range cmos, lvpecl, lvds, or hcsl output options fast sample turnaround ------- specifications ----- 1.0 specification references line parameter description 1.1 model description RCV7050P vcxo 1.2 reference number 1.3 rakon part number ----- 2.0 frequency characteristics line parameter test condition value unit 2.1 frequency 1 fs1 = 0, fs2 = 0. see pin connections for details 8 to 1500 mhz 2.2 frequency 2 fs1 = 1, fs2 = 0. see pin connections for details 8 to 1500 mhz 2.3 frequency 3 fs1 = 0, fs2 = 1. see pin connections for details 8 to 1500 mhz 2.4 frequency 4 fs1 = 1, fs2 = 1. see pin connections for details 8 to 1500 mhz 2.5 output switching time 0.1 max ms 2.6 operating temperature range -40 to 85 c 2.7 frequency stability including temperature range, supply variation, load variation and 10 years aging at 25c 25 to 50 ppm 2.8 temperature stability temperature range only 10 to 20 ppm ----- page 1
preliminary 3.0 power supply line parameter test condition value unit 3.1 supply voltage (vdd) with a tolerance of 10% 3.3 v 3.2 supply voltage (vdd) with a tolerance of 5% 2.5 v 3.3 supply current for lvcmos 30 max ma 3.4 supply current for lvpecl 65 max ma 3.5 supply current for lvds 40 max ma ----- 4.0 control voltage (vco) line parameter test condition value unit 4.1 absolute pull range (apr) 50 min ppm 4.2 total pull range frequency shift from minimum to maximum control voltage 50 to 250 ppm 4.3 control voltage nominal 1.65v 0 to 3.3 v 4.4 linearity control voltage 0.3 to 3v 10 max % 4.5 slope positive only 4.6 modulation bw control voltage 0.3 to 3v 10 min khz 4.7 input impedance 1 min m ----- 5.0 output characteristics - lvcmos (up to 200 mhz) line parameter test condition value unit 5.1 output voltage (vol) 15pf load 10 max %vdd 5.2 output voltage (voh) 15pf load 90 min %vdd 5.3 duty cycle @ 50% vdd 48 to 52 % 5.4 rise time / fall time 90%/10% 3 max ns 5.5 rms phase jitter integrated 12khz to 20mhz 0.4 to 1 ps ----- 6.0 output characteristics - lvpecl only line parameter test condition value unit 6.1 output voltage (vol) 50 nominal load. (vdd - 1.6v) max. 6.2 output voltage (voh) 50 nominal load. (vdd - 1.03v) min. 6.3 duty cycle @ vdd-1.3v (45 to 55% over 600mhz) 48 to 52 % 6.4 rise time / fall time 80%/20% 0.6 max ns 6.5 rms phase jitter integrated 12khz to 20mhz 0.4 to 1 ps ----- 7.0 output characteristics - lvds only line parameter test condition value unit 7.1 differential output: voltage swing (vod) 350 mv 7.2 duty cycle measured at 1.25v (45 to 55% over 150mhz) 48 to 52 % 7.3 rise time / fall time rl = 100 / cl = 10 pf 0.6 max ns 7.6 rms phase jitter integrated 12khz to 20mhz 0.4 to 1 ps ----- page 2
preliminary 8.0 ssb phase noise line parameter test condition value unit 8.1 ssb phase noise power density @ 10 hz offset typical value for a 77.76 mhz vcxo @ 25 c -68 dbc/hz 8.2 ssb phase noise power density @ 100 hz offset typical value for a 77.76 mhz vcxo @ 25 c -95 dbc/hz 8.3 ssb phase noise power density @ 1 khz offset typical value for a 77.76 mhz vcxo @ 25 c -120 dbc/hz 8.4 ssb phase noise power density @ 10 khz offset typical value for a 77.76 mhz vcxo @ 25 c -125 dbc/hz 8.5 ssb phase noise power density @ 100 khz offset typical value for a 77.76 mhz vcxo @ 25 c -128 dbc/hz ----- 9.0 ssb phase noise line parameter test condition value unit 9.1 ssb phase noise power density @ 10 hz offset typical value for a 155.52 mhz vcxo @ 25c -62 dbc/hz 9.2 ssb phase noise power density @ 100 hz offset typical value for a 155.52 mhz vcxo @ 25c -90 dbc/hz 9.3 ssb phase noise power density @ 1 khz offset typical value for a 155.52 mhz vcxo @ 25c -112 dbc/hz 9.4 ssb phase noise power density @ 10 khz offset typical value for a 155.52 mhz vcxo @ 25c -118 dbc/hz 9.5 ssb phase noise power density @ 100 khz offset typical value for a 155.52 mhz vcxo @ 25c -120 dbc/hz ----- 10.0 ssb phase noise line parameter test condition value unit 10.1 ssb phase noise power density @ 10 hz offset typical value for a 622.08 mhz vcxo @ 25c -48 dbc/hz 10.2 ssb phase noise power density @ 100 hz offset typical value for a 622.08 mhz vcxo @ 25c -78 dbc/hz 10.3 ssb phase noise power density @ 1 khz offset typical value for a 622.08 mhz vcxo @ 25c -101 dbc/hz 10.4 ssb phase noise power density @ 10 khz offset typical value for a 622.08 mhz vcxo @ 25c -107 dbc/hz 10.5 ssb phase noise power density @ 100 khz offset typical value for a 622.08 mhz vcxo @ 25c -108 dbc/hz ----- page 3
preliminary 11.0 pin connections line parameter description 11.1 pin 1 vco 11.2 pin 2 fs1*, or e/d** or nc 11.3 pin 3 gnd 11.4 pin 4 output 11.5 pin 5 complimentary output (lvpecl/lvds only), or e/d**, or nc 11.6 pin 6 vdd 11.7 pin 7 (package q) fs1* or nc 11.8 pin 8 (package q) fs2* or nc 11.9 * fs1, fs2 0 =<30% of vdd or gnd, 1 = >70% vdd 11.10 ** output enabled >70% of vdd on e/d pin, or e/d pin left open (internal pull-up resistor) 11.11 ** output disabled <30% of vdd on e/d pin, or e/d pin to gnd ----- 12.0 package details line parameter description 12.1 package package b (6 pin) or package q (8 pin) 12.2 top line [r ######] part identifier 12.3 bottom line [o fyww] pin 1, manufacturing code, year code* and week code** 12.4 * year code a = 2010, b = 2011, c = 2012, d = 2013, ... z = 2035 12.5 ** week code ww = 01 = week of first monday of the year ----- 13.0 environmental specification line parameter description 13.1 mechanical shock mil-std-883, method 2002 13.2 storage temperature range -55 to 125 c 13.3 humidity after 48 hours at 85 c2 c 85 % relative humidity non-condensing 13.4 thermal shock mil-std-883, method 1011 13.5 vibration mil-std-883, method 2007 13.6 gross and fine leak mil-std-883, method 1014 13.7 rohs compliant yes ----- 14.0 manufacturing information line parameter description 14.1 packaging description tape and reel. standard packing quantity is 2000 per reel 14.2 reflow solder reflow process as per attached profile ------- page 4
preliminary drawing name: xo/vcxo 7050 selectable frequency page 5
preliminary drawing name: xo/vcxo 7050 selectable frequency test circuit page 6
preliminary drawing name: xo/vcxo 7050 series tape & reel page 7
preliminary drawing name: pb-free reflow page 8
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